NTHC5513T1G: Analysis of 20V Complementary Power MOSFET Chip
1. One-Sentence Description
NTHC5513T1G is a 20V complementary power MOSFET chip launched by ON Semiconductor, integrating N-channel (+3.9A) and P-channel (-3.0A) transistors,采用 (adopting) ultra-thin ChipFET package, specially designed for high-density portable devices.
2. Core Features
- Dual-channel integration: Integrates N/P channel MOSFETs in a single chip, simplifying circuit layout.
- Miniaturized design: 40% smaller than TSOP-6 package, thickness <1.10mm, suitable for ultra-thin devices.
- Efficient thermal management: ChipFET package provides better heat dissipation performance than its size suggests.
- Environmental certification: Lead-free (Pb-Free), halogen-free, compliant with RoHS standards.
- Low on-resistance: N-channel as low as 60mΩ@4.5V, P-channel 130mΩ@-4.5V.
3. Core Technical Specifications
| Parameter | N-Channel | P-Channel | Condition |
|---|---|---|---|
| Continuous Drain Current (ID) | 2.9A@25℃ | -2.2A@25℃ | Steady state |
| Pulsed Drain Current (IDM) | 12A | -9.0A | t=10μs |
| Maximum Power Dissipation (PD) | 1.1W | - | TA=25℃ steady state |
| Switching Speed | td(ON)=5ns | td(ON)=7ns | RG=2.5Ω |
| Reverse Recovery Time (tRR) | 12.5ns | 32ns | di/dt=100A/μs |
4. The Story Behind the Chip
Born in the wave of miniaturization of portable devices, to solve the problems of large area occupation and difficult thermal management of traditional discrete MOSFETs, ON Semi innovatively adopted copper frame lead technology (1 in² pad on FR4 board), achieving a balance between power density and heat dissipation in the 1206A package, breaking through the power bottleneck of micro packages.
5. Design Philosophy
"Defining performance by package" :
- Improves thermal conductivity by optimizing the copper area of the Drain pin (see Style 2 pad design in the document).
- Sacrifices single-tube current for dual-tube integration, reducing the number of PCB components by 40%.
- Balances RDS(on) and gate charge (QG(TOT)≤4nC) to optimize energy efficiency ratio.
6. Application Scenarios
- Power management: DC-DC converters, load switches (scenarios requiring level shifting).
- Motor drive: Small brushless DC motors (continuous current of 2.9A meets most micro motors).
- Portable devices: Power switches for battery-powered products (such as TWS earphones, smart watches).
- High-density PCB: Space-constrained IoT modules, wearable device motherboards.
7. Unique Advantages
King of power density in the same size: Achieves 3.9A pulse current (N-channel) and 1.1W steady-state power consumption in a 1.10mm thick package. Its volume power ratio (1.22mm² copper area supports 2.1W@85℃) far exceeds that of peer ChipFET devices, and it supports 260℃ reflow soldering temperature.
8. Key Considerations for Engineers in Selection
- Derating warning: Current drops sharply at high temperatures (N-channel 2.9A→2.1A@85℃), 30% margin should be reserved.
- Layout key: Must use ≥1 in² copper pad (Style 2 or Style 5 in the document), otherwise thermal resistance RθJA rises to 110℃/W.
- Drive compatibility: Gate voltage range is ±12V, but VGS(th) is only 0.6~1.2V, suitable for low-voltage logic control.
- Pulse operation limit: Pulse current (such as 3.9A) is only supported for ≤5 seconds, exceeding which causes thermal failure.
Note
All data is derived from ON Semiconductor's public datasheet. Please verify the latest version before design.
